If you just want to build, there is a build guide here there is also a gitter for a more interactive discussion if you just want to peak the code its on github.
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Formal Verification uses mathematical techniques to exhaustively prove that a property, or an obligation that must hold in a system, is proven under all possible conditions or inputs of an RTL design.
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Over the last year or so we’ve noticed a definite uptick in the number of folks using OpenOCD on the Raspberry Pi. It’s a cheap and convenient solution for poking around with various microcontrollers and embedded devices, but not always the most elegant.
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I was desperate for something to read during lockdown and found in my bookcase an IEEE report on Speech Recognition from the late 1970s. Could an Arduino Nano do the same as a computer from that era?
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I’m currently in the process of building and verifying several AXI cores, primarily for the purpose of proving that my AXI formal Verification IP core works. Some examples of these cores include: Most of these cores have already passed a formal verification check.
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Someone recently posted on Xilinx’s forums that they were having issues with their design. Apparently, the design was hanging on startup. When I asked if they had an AXI-lite slave within it, they shared their design with me. It looked an awful lot like Xilinx’s AXI-lite template design.
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There are many good, modern solutions for reading data off old floppy discs and drives. Perhaps the best is the Greaseweazle: it’s capable, open source, open hardware, inexpensive and has a vibrant and friendly community behind it.
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These days, if you want to code a game for the original Nintendo Entertainment System, it’s about as easy as downloading an assembler, firing up Notepad, and running the ROMs you cook up in any one of a variety of emulators.
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Table of Contents A difficult start The story so far… As part of my work on reverse-engineering eInk price tags I ran into an interesting problem.
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In this post I’ll explore a bit the Open Source toolchain for Xilinx Series 7 FPGAs and will focus the Artix 7. The post will detail how to run the complete flow using Docker containers avoiding local toolchain installs and homogenizing the process for most platforms (Linux, Mac, Windows).
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