Monthly Archives: January 2020

Inside the digital clock from a Soyuz spacecraft

We recently obtained a clock that flew on a Soyuz space mission.1 The clock, manufactured in 1984, contains over 100 integrated circuits on ten circuit boards. Why is the clock so complicated? In this blog post, I examine the clock’s circuitry and explain why so many chips were needed.

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La libération des FPGA et des ASIC bien engagée pour 2020

En début d’année 2019 se posait la question de savoir si ce serait l’année de la libération des FPGA. En ce début d’année 2020, essayons de faire un bilan. FPGA, ASC, HDL, RISC‑Ⅴ et PCB sont les chapitres que nous allons découvrir dans la suite de cet article.

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RISC-V Educational Materials

RISC-V Educational Materials Author/University Link Access Level Platform Content Type Udemy Link Paid 2 Sim HW a,d Oakland University Link Open 2 Unspecified HW f University of Rochester Link Open 1 Unspecified SW f University of Cambridge Link Open 2 FPGA HW f University of Wisconsin-Madison Link

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RSD RISC-V Out-of-Order Superscalar Processor

RSD is a 32-bit RISC-V out-of-order superscalar processor core. RSD is very fast due to aggressive OoO features, while it is very compact and can be synthesized for small FPGAs. The key features of RSD are as follows: Install the following software for running simulation.

from Pocket
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