Monthly Archives: June 2019

Evolutionary FPGA Simulation on DE1-SoC

Our ECE 5760 Final Project uses the Terasic DE1-SoC’s Cyclone V FPGA and Cortex-A9 cores to fully simulate a Xilinx XC6200 FPGA. We test the functionity of the hardware-simulated FPGA and experiment on its ability to discern between input frequences using a genetic algorithm.

from Pocket
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FPGA Soft CPU Is Superscalar

We will admit it: mostly when we see a homebrew CPU design on an FPGA, it is a simple design that wouldn’t raise any eyebrows in the 1970s or 1980s. Not so with [Henry Wong’s] design, though. His x86-like design does superscalar out-of-order execution, just like big commercial modern CPUs.

from Pocket
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Dumping Commodore 64/1541 Disks with Errors

Many old Commodore 64/1541 disks have read errors, but this doesn’t mean the data isn’t recoverable – with the right nibtools settings and some cleaning. The ZoomFloppy adapter is the de-facto standard for connecting Commodore disk drives to modern computers, using a USB connection.

from Pocket
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