Author Archives: Elexhere

JTAG Hat Turns Raspberry Pi Into A Networked Debugger

Over the last year or so we’ve noticed a definite uptick in the number of folks using OpenOCD on the Raspberry Pi. It’s a cheap and convenient solution for poking around with various microcontrollers and embedded devices, but not always the most elegant.

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Building a Skid Buffer for AXI processing

I’m currently in the process of building and verifying several AXI cores, primarily for the purpose of proving that my AXI formal Verification IP core works. Some examples of these cores include: Most of these cores have already passed a formal verification check.

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Fixing Xilinx’s Broken AXI-lite Design in VHDL

Someone recently posted on Xilinx’s forums that they were having issues with their design. Apparently, the design was hanging on startup. When I asked if they had an AXI-lite slave within it, they shared their design with me. It looked an awful lot like Xilinx’s AXI-lite template design.

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